Dekar's Blog

RTL-SDR transformer mod

Elias Önal — Wed, 07 Nov 2012 22:19:55 +0000

Quite a while ago I tried the HF Mod (aka Direct Sampling Mod) on one of my dongles. The simplest way of doing it is by connecting one of the RTL2832U’s ADC (pin 1 or 2) inputs to an antenna which is exactly how I started. Shortly after that mikikg told me about using a transformer in order to generate a differential signal for the ADCs differential input, as well as boosting the signal and matching impedance. As a quick and dirty solution I desoldered a H16105DF 10/100Mbps Ethernet decoupling transformer from an old ADSL modem and used it. It actually matches the frequencies we care about quite well and in addition serves as a low pass filter. At the moment it is used in a 1:1 configuration, though 1:2 will probably perform better, thus I plan to try that as well. Using it together with an antenna made from a few meters of litz I receive many AM radio stations as well as lots of other signals.

Update:
Since someone over at reddit claimed that mikikg originally came up with using Ethernet transformers for the mod, implying I wouldn’t credit him properly, I feel like clarifying. On 10/3/12 I sent him a mail explaining that I had tried a variation of the HF-Mod using an Ethernet transformer and that the results were promising, I also attached a picture to that mail. Seemingly we then both blogged about it quite a while later, yet he did so before I did.

Update #2:
I have tried using the transformer in a 1:2 configuration and the signal actually got worse. That makes me wonder about the RTL2832U’s input impedance.

Power supply failures can be pretty annoying to find

Elias Önal — Wed, 31 Oct 2012 20:32:35 +0000

Recently one of the four drives in my HTPC kept dropping out, first it happened once every few days, then after several hours. The weird thing was that it always came back after losing the SATA link and allowed me to mount it again. I first thought it was a problem of the SATA controller or cables so I switched the drives around, yet the same drive was still affected. I then assumed it was related to the drive which got me sidetracked for a while, till I routinely decided to reset the BIOS. Doing so I randomly had a look at the supply voltages, the 12V rail had dropped to around 10.2V.
Gladly I had a spare ATX PSU which I then switched in resolving all the problems. The PSU that failed was a one hung low 75W high efficiency one that came with a miniITX case I bought a while ago. It consists of a AC/DC power brick supplying 12V and a DC/DC switch mode board generating the whole variety of ATX voltages. Some of the DC/DC boards electrolytic capacitors were bulgy and I couldn’t even find a datasheet for their brand so I decided to replace them all with fresh low ESR ones. Needless to say that solved the problem and it now works fine (11.83V) again.
It really was an annoying experience and the symptoms were highly misleading. After all the drive was fine, and it was just the manifestation of a completely different problem. From now on I will routinely check lm-sensors for voltages as well.

This was what my dmesg looked like:

Oct 27 18:57:14 mediapc2 kernel: [ 162.075774] ata7.00: exception Emask 0×10 SAct 0×0 SErr 0×1990000 action 0xe frozen
Oct 27 18:57:14 mediapc2 kernel: [ 162.075783] ata7.00: irq_stat 0×00400000, PHY RDY changed
Oct 27 18:57:14 mediapc2 kernel: [ 162.075790] ata7: SError: { PHYRdyChg 10B8B Dispar LinkSeq TrStaTrns }
Oct 27 18:57:14 mediapc2 kernel: [ 162.075795] ata7.00: failed command: SMART
Oct 27 18:57:14 mediapc2 kernel: [ 162.075806] ata7.00: cmd b0/da:00:00:4f:c2/00:00:00:00:00/00 tag 0
Oct 27 18:57:14 mediapc2 kernel: [ 162.075808] res 50/00:ff:00:00:00/00:00:00:00:00/00 Emask 0×10 (ATA bus error)
Oct 27 18:57:14 mediapc2 kernel: [ 162.075813] ata7.00: status: { DRDY }
Oct 27 18:57:14 mediapc2 kernel: [ 162.075822] ata7: hard resetting link
Oct 27 18:57:24 mediapc2 kernel: [ 172.089031] ata7: softreset failed (device not ready)
Oct 27 18:57:24 mediapc2 kernel: [ 172.089042] ata7: hard resetting link
Oct 27 18:57:25 mediapc2 kernel: [ 172.977038] ata7: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
Oct 27 18:57:25 mediapc2 kernel: [ 172.989529] ata7.00: configured for UDMA/133
Oct 27 18:57:25 mediapc2 kernel: [ 172.989561] ata7: EH complete
Oct 27 19:24:55 mediapc2 kernel: [ 1823.374114] ata7: exception Emask 0×10 SAct 0×0 SErr 0×1990000 action 0xe frozen
Oct 27 19:24:55 mediapc2 kernel: [ 1823.374165] ata7: irq_stat 0×00400000, PHY RDY changed
Oct 27 19:24:55 mediapc2 kernel: [ 1823.374206] ata7: SError: { PHYRdyChg 10B8B Dispar LinkSeq TrStaTrns }
Oct 27 19:24:55 mediapc2 kernel: [ 1823.374269] ata7: hard resetting link
Oct 27 19:25:00 mediapc2 kernel: [ 1828.380726] ata6: exception Emask 0×10 SAct 0×0 SErr 0×1810000 action 0xe frozen
Oct 27 19:25:00 mediapc2 kernel: [ 1828.380769] ata6: irq_stat 0×00400000, PHY RDY changed
Oct 27 19:25:00 mediapc2 kernel: [ 1828.380806] ata6: SError: { PHYRdyChg LinkSeq TrStaTrns }
Oct 27 19:25:00 mediapc2 kernel: [ 1828.380846] ata6: hard resetting link
Oct 27 19:25:05 mediapc2 kernel: [ 1833.388026] ata7: softreset failed (device not ready)
Oct 27 19:25:05 mediapc2 kernel: [ 1833.388069] ata7: hard resetting link
Oct 27 19:25:10 mediapc2 kernel: [ 1838.396035] ata6: softreset failed (device not ready)
Oct 27 19:25:10 mediapc2 kernel: [ 1838.396078] ata6: hard resetting link
Oct 27 19:25:11 mediapc2 kernel: [ 1839.152045] ata7: SATA link down (SStatus 20 SControl 300)
Oct 27 19:25:11 mediapc2 kernel: [ 1839.152055] ata7.00: link offline, clearing class 1 to NONE
Oct 27 19:25:11 mediapc2 kernel: [ 1839.160816] ata7: hard resetting link
Oct 27 19:25:20 mediapc2 kernel: [ 1848.428028] ata6: softreset failed (device not ready)
Oct 27 19:25:20 mediapc2 kernel: [ 1848.428071] ata6: hard resetting link
Oct 27 19:25:21 mediapc2 kernel: [ 1849.164026] ata7: softreset failed (device not ready)
Oct 27 19:25:21 mediapc2 kernel: [ 1849.164063] ata7: hard resetting link
Oct 27 19:25:26 mediapc2 kernel: [ 1854.072034] ata7: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
Oct 27 19:25:26 mediapc2 kernel: [ 1854.107379] ata7.00: configured for UDMA/133
Oct 27 19:25:26 mediapc2 kernel: [ 1854.107389] ata7: EH complete
Oct 27 19:25:31 mediapc2 kernel: [ 1859.396027] ata6: link is slow to respond, please be patient (ready=0)
Oct 27 19:25:55 mediapc2 kernel: [ 1883.476028] ata6: softreset failed (device not ready)
Oct 27 19:25:55 mediapc2 kernel: [ 1883.476071] ata6: limiting SATA link speed to 1.5 Gbps
Oct 27 19:25:55 mediapc2 kernel: [ 1883.476077] ata6: hard resetting link
Oct 27 19:26:03 mediapc2 kernel: [ 1890.936813] ata7: exception Emask 0×10 SAct 0×0 SErr 0×1990000 action 0xe frozen
Oct 27 19:26:03 mediapc2 kernel: [ 1890.936856] ata7: irq_stat 0×00400000, PHY RDY changed
Oct 27 19:26:03 mediapc2 kernel: [ 1890.936892] ata7: SError: { PHYRdyChg 10B8B Dispar LinkSeq TrStaTrns }
Oct 27 19:26:03 mediapc2 kernel: [ 1890.936934] ata7: hard resetting link
Oct 27 19:26:13 mediapc2 kernel: [ 1900.952028] ata7: softreset failed (device not ready)
Oct 27 19:26:13 mediapc2 kernel: [ 1900.952071] ata7: hard resetting link
Oct 27 19:26:16 mediapc2 kernel: [ 1904.416031] ata7: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
Oct 27 19:26:16 mediapc2 kernel: [ 1904.442015] ata7.00: configured for UDMA/133
Oct 27 19:26:16 mediapc2 kernel: [ 1904.442024] ata7: EH complete
Oct 27 19:26:16 mediapc2 kernel: [ 1904.572033] ata6: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
Oct 27 19:26:16 mediapc2 kernel: [ 1904.599421] ata6.00: configured for UDMA/133
Oct 27 19:26:16 mediapc2 kernel: [ 1904.599430] ata6: EH complete
Oct 27 19:28:18 mediapc2 kernel: [ 2025.998821] ata7: exception Emask 0×10 SAct 0×0 SErr 0×1990000 action 0xe frozen
Oct 27 19:28:18 mediapc2 kernel: [ 2025.998870] ata7: irq_stat 0×00400000, PHY RDY changed
Oct 27 19:28:18 mediapc2 kernel: [ 2025.998913] ata7: SError: { PHYRdyChg 10B8B Dispar LinkSeq TrStaTrns }
Oct 27 19:28:18 mediapc2 kernel: [ 2025.998963] ata7: hard resetting link
Oct 27 19:28:18 mediapc2 kernel: [ 2025.999016] ata6: exception Emask 0×10 SAct 0×0 SErr 0×1810000 action 0xe frozen
Oct 27 19:28:18 mediapc2 kernel: [ 2025.999059] ata6: irq_stat 0×00400000, PHY RDY changed
Oct 27 19:28:18 mediapc2 kernel: [ 2025.999108] ata6: SError: { PHYRdyChg LinkSeq TrStaTrns }
Oct 27 19:28:18 mediapc2 kernel: [ 2025.999163] ata6: hard resetting link
Oct 27 19:28:24 mediapc2 kernel: [ 2031.760061] ata7: SATA link down (SStatus 20 SControl 300)
Oct 27 19:28:24 mediapc2 kernel: [ 2031.760070] ata7.00: link offline, clearing class 1 to NONE
Oct 27 19:28:24 mediapc2 kernel: [ 2031.802742] ata7: hard resetting link
Oct 27 19:28:28 mediapc2 kernel: [ 2036.016028] ata6: softreset failed (device not ready)
Oct 27 19:28:28 mediapc2 kernel: [ 2036.016078] ata6: hard resetting link
Oct 27 19:28:29 mediapc2 kernel: [ 2036.904043] ata6: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
Oct 27 19:28:29 mediapc2 kernel: [ 2036.929302] ata6.00: configured for UDMA/133
Oct 27 19:28:29 mediapc2 kernel: [ 2036.929311] ata6: EH complete
Oct 27 19:28:34 mediapc2 kernel: [ 2041.808033] ata7: softreset failed (device not ready)
Oct 27 19:28:34 mediapc2 kernel: [ 2041.808084] ata7: hard resetting link
Oct 27 19:28:34 mediapc2 kernel: [ 2042.288043] ata7: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
Oct 27 19:28:34 mediapc2 kernel: [ 2042.325927] ata7.00: configured for UDMA/133
Oct 27 19:28:34 mediapc2 kernel: [ 2042.325937] ata7: EH complete
Oct 27 19:29:04 mediapc2 kernel: [ 2071.927629] ata7: limiting SATA link speed to 1.5 Gbps
Oct 27 19:29:04 mediapc2 kernel: [ 2071.927638] ata7: exception Emask 0×10 SAct 0×0 SErr 0×1990000 action 0xe frozen
Oct 27 19:29:04 mediapc2 kernel: [ 2071.927695] ata7: irq_stat 0×00400000, PHY RDY changed
Oct 27 19:29:04 mediapc2 kernel: [ 2071.927739] ata7: SError: { PHYRdyChg 10B8B Dispar LinkSeq TrStaTrns }
Oct 27 19:29:04 mediapc2 kernel: [ 2071.927788] ata7: hard resetting link
Oct 27 19:29:05 mediapc2 kernel: [ 2072.855506] ata6: exception Emask 0×10 SAct 0×0 SErr 0×1990000 action 0xe frozen
Oct 27 19:29:05 mediapc2 kernel: [ 2072.855565] ata6: irq_stat 0×00400000, PHY RDY changed
Oct 27 19:29:05 mediapc2 kernel: [ 2072.855609] ata6: SError: { PHYRdyChg 10B8B Dispar LinkSeq TrStaTrns }
Oct 27 19:29:05 mediapc2 kernel: [ 2072.855658] ata6: hard resetting link
Oct 27 19:29:14 mediapc2 kernel: [ 2081.940029] ata7: softreset failed (device not ready)
Oct 27 19:29:14 mediapc2 kernel: [ 2081.940079] ata7: hard resetting link
Oct 27 19:29:15 mediapc2 kernel: [ 2082.868029] ata6: softreset failed (device not ready)
Oct 27 19:29:15 mediapc2 kernel: [ 2082.868080] ata6: hard resetting link
Oct 27 19:29:19 mediapc2 kernel: [ 2087.452072] ata6: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
Oct 27 19:29:19 mediapc2 kernel: [ 2087.478782] ata6.00: configured for UDMA/133
Oct 27 19:29:19 mediapc2 kernel: [ 2087.478797] ata6: EH complete
Oct 27 19:29:24 mediapc2 kernel: [ 2091.964077] ata7: softreset failed (device not ready)
Oct 27 19:29:24 mediapc2 kernel: [ 2091.964135] ata7: hard resetting link
Oct 27 19:29:25 mediapc2 kernel: [ 2092.679513] ata6.00: limiting speed to UDMA/100:PIO4
Oct 27 19:29:25 mediapc2 kernel: [ 2092.679522] ata6: exception Emask 0×10 SAct 0×0 SErr 0×1810000 action 0xe frozen
Oct 27 19:29:25 mediapc2 kernel: [ 2092.679579] ata6: irq_stat 0×00400000, PHY RDY changed
Oct 27 19:29:25 mediapc2 kernel: [ 2092.679623] ata6: SError: { PHYRdyChg LinkSeq TrStaTrns }
Oct 27 19:29:25 mediapc2 kernel: [ 2092.679671] ata6: hard resetting link
Oct 27 19:29:35 mediapc2 kernel: [ 2102.692026] ata6: softreset failed (device not ready)
Oct 27 19:29:35 mediapc2 kernel: [ 2102.692078] ata6: hard resetting link
Oct 27 19:29:35 mediapc2 kernel: [ 2103.504028] ata7: link is slow to respond, please be patient (ready=0)
Oct 27 19:29:35 mediapc2 kernel: [ 2103.580029] ata6: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
Oct 27 19:29:35 mediapc2 kernel: [ 2103.601603] ata6.00: configured for UDMA/100
Oct 27 19:29:35 mediapc2 kernel: [ 2103.601612] ata6: EH complete
Oct 27 19:29:59 mediapc2 kernel: [ 2126.988048] ata7: softreset failed (device not ready)
Oct 27 19:29:59 mediapc2 kernel: [ 2126.988108] ata7: hard resetting link
Oct 27 19:30:00 mediapc2 kernel: [ 2127.876061] ata7: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
Oct 27 19:30:00 mediapc2 kernel: [ 2128.286454] ata7.00: configured for UDMA/133
Oct 27 19:30:00 mediapc2 kernel: [ 2128.286464] ata7: EH complete
Oct 27 19:30:56 mediapc2 kernel: [ 2184.418375] ata7: exception Emask 0×10 SAct 0×0 SErr 0×1810000 action 0xe frozen
Oct 27 19:30:56 mediapc2 kernel: [ 2184.418441] ata7: irq_stat 0×00400000, PHY RDY changed
Oct 27 19:30:56 mediapc2 kernel: [ 2184.418602] ata7: SError: { PHYRdyChg LinkSeq TrStaTrns }
Oct 27 19:30:56 mediapc2 kernel: [ 2184.418697] ata7: hard resetting link
Oct 27 19:30:56 mediapc2 kernel: [ 2184.418727] ata6: exception Emask 0×10 SAct 0×0 SErr 0×1810000 action 0xe frozen
Oct 27 19:30:56 mediapc2 kernel: [ 2184.418785] ata6: irq_stat 0×00400000, PHY RDY changed
Oct 27 19:30:56 mediapc2 kernel: [ 2184.418834] ata6: SError: { PHYRdyChg LinkSeq TrStaTrns }
Oct 27 19:30:56 mediapc2 kernel: [ 2184.418890] ata6: hard resetting link
Oct 27 19:31:06 mediapc2 kernel: [ 2194.432540] ata6: softreset failed (device not ready)
Oct 27 19:31:06 mediapc2 kernel: [ 2194.432596] ata6: hard resetting link
Oct 27 19:31:06 mediapc2 kernel: [ 2194.432614] ata7: softreset failed (device not ready)
Oct 27 19:31:06 mediapc2 kernel: [ 2194.432662] ata7: hard resetting link
Oct 27 19:31:07 mediapc2 kernel: [ 2195.320034] ata6: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
Oct 27 19:31:07 mediapc2 kernel: [ 2195.340777] ata6.00: configured for UDMA/100
Oct 27 19:31:07 mediapc2 kernel: [ 2195.340789] ata6: EH complete
Oct 27 19:31:08 mediapc2 kernel: [ 2195.768036] ata7: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
Oct 27 19:31:08 mediapc2 kernel: [ 2195.800345] ata7.00: configured for UDMA/133
Oct 27 19:31:08 mediapc2 kernel: [ 2195.800357] ata7: EH complete
Oct 27 19:34:22 mediapc2 kernel: [ 2389.990078] ata7: exception Emask 0×10 SAct 0×0 SErr 0×1990000 action 0xe frozen
Oct 27 19:34:22 mediapc2 kernel: [ 2389.990143] ata7: irq_stat 0×00400000, PHY RDY changed
Oct 27 19:34:22 mediapc2 kernel: [ 2389.990192] ata7: SError: { PHYRdyChg 10B8B Dispar LinkSeq TrStaTrns }
Oct 27 19:34:22 mediapc2 kernel: [ 2389.990248] ata7: hard resetting link
Oct 27 19:34:22 mediapc2 kernel: [ 2389.990303] ata6.00: limiting speed to UDMA/33:PIO4
Oct 27 19:34:22 mediapc2 kernel: [ 2389.990311] ata6: exception Emask 0×10 SAct 0×0 SErr 0×1990000 action 0xe frozen
Oct 27 19:34:22 mediapc2 kernel: [ 2389.990367] ata6: irq_stat 0×00400000, PHY RDY changed
Oct 27 19:34:22 mediapc2 kernel: [ 2389.990415] ata6: SError: { PHYRdyChg 10B8B Dispar LinkSeq TrStaTrns }
Oct 27 19:34:22 mediapc2 kernel: [ 2389.990471] ata6: hard resetting link
Oct 27 19:34:32 mediapc2 kernel: [ 2400.004031] ata7: softreset failed (device not ready)
Oct 27 19:34:32 mediapc2 kernel: [ 2400.004082] ata7: hard resetting link
Oct 27 19:34:32 mediapc2 kernel: [ 2400.004094] ata6: softreset failed (device not ready)
Oct 27 19:34:32 mediapc2 kernel: [ 2400.004137] ata6: hard resetting link
Oct 27 19:34:35 mediapc2 kernel: [ 2403.524034] ata6: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
Oct 27 19:34:35 mediapc2 kernel: [ 2403.547023] ata6.00: configured for UDMA/33
Oct 27 19:34:35 mediapc2 kernel: [ 2403.547034] ata6: EH complete
Oct 27 19:34:42 mediapc2 kernel: [ 2410.020534] ata7: softreset failed (device not ready)
Oct 27 19:34:42 mediapc2 kernel: [ 2410.020587] ata7: hard resetting link
Oct 27 19:34:43 mediapc2 kernel: [ 2410.908040] ata7: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
Oct 27 19:34:43 mediapc2 kernel: [ 2410.926177] ata7.00: configured for UDMA/133
Oct 27 19:34:43 mediapc2 kernel: [ 2410.926189] ata7: EH complete
Oct 27 19:37:20 mediapc2 kernel: [ 2567.834778] ata7: exception Emask 0×10 SAct 0×0 SErr 0×1990000 action 0xe frozen
Oct 27 19:37:20 mediapc2 kernel: [ 2567.834840] ata7: irq_stat 0×00400000, PHY RDY changed
Oct 27 19:37:20 mediapc2 kernel: [ 2567.834887] ata7: SError: { PHYRdyChg 10B8B Dispar LinkSeq TrStaTrns }
Oct 27 19:37:20 mediapc2 kernel: [ 2567.834938] ata7: hard resetting link
Oct 27 19:37:21 mediapc2 kernel: [ 2568.761550] ata6: exception Emask 0×10 SAct 0×0 SErr 0×1990000 action 0xe frozen
Oct 27 19:37:21 mediapc2 kernel: [ 2568.761610] ata6: irq_stat 0×00400000, PHY RDY changed
Oct 27 19:37:21 mediapc2 kernel: [ 2568.761655] ata6: SError: { PHYRdyChg 10B8B Dispar LinkSeq TrStaTrns }
Oct 27 19:37:21 mediapc2 kernel: [ 2568.761705] ata6: hard resetting link
Oct 27 19:37:30 mediapc2 kernel: [ 2577.856031] ata7: softreset failed (device not ready)
Oct 27 19:37:30 mediapc2 kernel: [ 2577.856081] ata7: hard resetting link
Oct 27 19:37:31 mediapc2 kernel: [ 2578.745046] ata7: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
Oct 27 19:37:31 mediapc2 kernel: [ 2578.773052] ata7.00: configured for UDMA/133
Oct 27 19:37:31 mediapc2 kernel: [ 2578.773066] ata7: EH complete
Oct 27 19:37:31 mediapc2 kernel: [ 2578.797034] ata6: softreset failed (device not ready)
Oct 27 19:37:31 mediapc2 kernel: [ 2578.797085] ata6: hard resetting link
Oct 27 19:37:32 mediapc2 kernel: [ 2579.684531] ata6: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
Oct 27 19:37:32 mediapc2 kernel: [ 2579.705605] ata6.00: configured for UDMA/33
Oct 27 19:37:32 mediapc2 kernel: [ 2579.705620] ata6: EH complete
Oct 27 19:38:01 mediapc2 kernel: [ 2608.859342] ata6: exception Emask 0×10 SAct 0×0 SErr 0×1810000 action 0xe frozen
Oct 27 19:38:01 mediapc2 kernel: [ 2608.859401] ata6: irq_stat 0×00400000, PHY RDY changed
Oct 27 19:38:01 mediapc2 kernel: [ 2608.859445] ata6: SError: { PHYRdyChg LinkSeq TrStaTrns }
Oct 27 19:38:01 mediapc2 kernel: [ 2608.859494] ata6: hard resetting link
Oct 27 19:38:02 mediapc2 kernel: [ 2609.806213] ata7.00: limiting speed to UDMA/100:PIO4
Oct 27 19:38:02 mediapc2 kernel: [ 2609.806222] ata7: exception Emask 0×10 SAct 0×0 SErr 0×1810000 action 0xe frozen
Oct 27 19:38:02 mediapc2 kernel: [ 2609.806279] ata7: irq_stat 0×00400000, PHY RDY changed
Oct 27 19:38:02 mediapc2 kernel: [ 2609.806323] ata7: SError: { PHYRdyChg LinkSeq TrStaTrns }
Oct 27 19:38:02 mediapc2 kernel: [ 2609.806372] ata7: hard resetting link
Oct 27 19:38:11 mediapc2 kernel: [ 2618.892040] ata6: softreset failed (device not ready)
Oct 27 19:38:11 mediapc2 kernel: [ 2618.892090] ata6: hard resetting link
Oct 27 19:38:12 mediapc2 kernel: [ 2619.785032] ata6: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
Oct 27 19:38:12 mediapc2 kernel: [ 2619.811750] ata6.00: configured for UDMA/33
Oct 27 19:38:12 mediapc2 kernel: [ 2619.811760] ata6: EH complete
Oct 27 19:38:12 mediapc2 kernel: [ 2619.832044] ata7: softreset failed (device not ready)
Oct 27 19:38:12 mediapc2 kernel: [ 2619.832098] ata7: hard resetting link
Oct 27 19:38:13 mediapc2 kernel: [ 2620.720039] ata7: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
Oct 27 19:38:13 mediapc2 kernel: [ 2620.735611] ata7.00: configured for UDMA/100
Oct 27 19:38:13 mediapc2 kernel: [ 2620.735621] ata7: EH complete
Oct 27 19:43:44 mediapc2 kernel: [ 2952.333822] ata7.00: exception Emask 0×10 SAct 0×1 SErr 0×1810000 action 0xe frozen
Oct 27 19:43:44 mediapc2 kernel: [ 2952.333884] ata7.00: irq_stat 0×00400000, PHY RDY changed
Oct 27 19:43:44 mediapc2 kernel: [ 2952.333930] ata7: SError: { PHYRdyChg LinkSeq TrStaTrns }
Oct 27 19:43:44 mediapc2 kernel: [ 2952.333976] ata7.00: failed command: READ FPDMA QUEUED
Oct 27 19:43:44 mediapc2 kernel: [ 2952.334026] ata7.00: cmd 60/20:00:00:00:00/00:00:00:00:00/40 tag 0 ncq 16384 in
Oct 27 19:43:44 mediapc2 kernel: [ 2952.334028] res 40/00:04:00:00:00/00:00:00:00:00/40 Emask 0×10 (ATA bus error)
Oct 27 19:43:44 mediapc2 kernel: [ 2952.334132] ata7.00: status: { DRDY }
Oct 27 19:43:44 mediapc2 kernel: [ 2952.334180] ata7: hard resetting link
Oct 27 19:43:44 mediapc2 kernel: [ 2952.363075] ata6.00: exception Emask 0×10 SAct 0×1 SErr 0×1810000 action 0xe frozen
Oct 27 19:43:44 mediapc2 kernel: [ 2952.363136] ata6.00: irq_stat 0×00400000, PHY RDY changed
Oct 27 19:43:44 mediapc2 kernel: [ 2952.363182] ata6: SError: { PHYRdyChg LinkSeq TrStaTrns }
Oct 27 19:43:44 mediapc2 kernel: [ 2952.363227] ata6.00: failed command: READ FPDMA QUEUED
Oct 27 19:43:44 mediapc2 kernel: [ 2952.363277] ata6.00: cmd 60/08:00:00:00:00/00:00:00:00:00/40 tag 0 ncq 4096 in
Oct 27 19:43:44 mediapc2 kernel: [ 2952.363279] res 40/00:04:00:00:00/00:00:00:00:00/40 Emask 0×10 (ATA bus error)
Oct 27 19:43:44 mediapc2 kernel: [ 2952.363382] ata6.00: status: { DRDY }
Oct 27 19:43:44 mediapc2 kernel: [ 2952.363429] ata6: hard resetting link
Oct 27 19:43:54 mediapc2 kernel: [ 2962.348029] ata7: softreset failed (device not ready)
Oct 27 19:43:54 mediapc2 kernel: [ 2962.348080] ata7: hard resetting link
Oct 27 19:43:54 mediapc2 kernel: [ 2962.376027] ata6: softreset failed (device not ready)
Oct 27 19:43:54 mediapc2 kernel: [ 2962.376074] ata6: hard resetting link
Oct 27 19:44:01 mediapc2 kernel: [ 2969.032035] ata6: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
Oct 27 19:44:04 mediapc2 kernel: [ 2972.012034] ata7: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
Oct 27 19:44:06 mediapc2 kernel: [ 2974.032043] ata6.00: qc timeout (cmd 0xec)
Oct 27 19:44:06 mediapc2 kernel: [ 2974.032054] ata6.00: failed to IDENTIFY (I/O error, err_mask=0×4)
Oct 27 19:44:06 mediapc2 kernel: [ 2974.032059] ata6.00: revalidation failed (errno=-5)
Oct 27 19:44:06 mediapc2 kernel: [ 2974.032110] ata6: hard resetting link
Oct 27 19:44:06 mediapc2 kernel: [ 2974.516050] ata6: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
Oct 27 19:44:06 mediapc2 kernel: [ 2974.537802] ata6.00: configured for UDMA/33
Oct 27 19:44:06 mediapc2 kernel: [ 2974.537822] ata6: EH complete
Oct 27 19:44:09 mediapc2 kernel: [ 2977.013038] ata7.00: qc timeout (cmd 0xec)
Oct 27 19:44:09 mediapc2 kernel: [ 2977.013049] ata7.00: failed to IDENTIFY (I/O error, err_mask=0×4)
Oct 27 19:44:09 mediapc2 kernel: [ 2977.013055] ata7.00: revalidation failed (errno=-5)
Oct 27 19:44:09 mediapc2 kernel: [ 2977.013104] ata7: hard resetting link
Oct 27 19:44:09 mediapc2 kernel: [ 2977.497041] ata7: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
Oct 27 19:44:09 mediapc2 kernel: [ 2977.519787] ata7.00: configured for UDMA/100
Oct 27 19:44:09 mediapc2 kernel: [ 2977.519806] ata7: EH complete

The power of TNT is at your disposal

Elias Önal — Thu, 11 Oct 2012 22:54:19 +0000

TNT stands for Thumb2 Newlib Toolchain, a GCC/Newlib based toolchain project I started quite a while ago. Trying various other toolchains like CodeSourcery, summon-arm-toolchain and YAGARTO, I realized none of them really seemed to have the smallest ARM Cortex-M microcontrollers in mind; They were wasteful with RAM as well as flash memory. TNT has been optimized for small unhosted (bare-metal) microcontroller targets and thus size optimizations have been the primary goal. Especially the C-library Newlib has been configured for the least possible size which makes using it (e.g. printf()) much more affordable. I have seen size reductions of over 30% compared to other GCC based toolchains when compiling the TNT_Example project.

The following architectures are supported:
armv6s-m (cortex-m0/cortex-m1) armv7-m (cortex-m3) armv7e-m (cortex-m4/cortex-m4f including FPU and DSP instruction support)

The TNT_Example project is targeted at beginners using STM32 microcontrollers, it plays well with TNT and other GCC based toolchains. It has an example on how to implement the Newlib stubs to get syscalls like malloc() and printf() working. For the STM32F4 discovery board you can just compile it and get the lights blinking. For other targets you’ll have to slightly adjust the makefile. https://github.com/EliasOenal/TNT_Example

TNT precompiled downloads:
Linux x64
OSX x64

Source:
https://github.com/EliasOenal/TNT

Software licenses:
stlink
newlib
GCC, GDB, binutils

OSX port of the awesome gqrx SDR software [Update 02/03/2013]

Elias Önal — Sun, 30 Sep 2012 12:47:06 +0000

A while ago I already managed to compile gqrx on OSX, but then Alexandru Csete decided to move on to a new audio backend called pulseaudio. Sadly there is no proper pulseaudio port for OSX. Thus I bring you my branch of gqrx 2.1 which runs quite well on OSX.

It contains all the rtl-sdr, gr-osmosdr, GNU Radio, libUSB, boost and Qt dependencies so it should work out of the box. Feel free to contact me in case you encounter problems. I built it on OSX Lion (10.7), and people on Reddit reported it running well on OSX Mountain Lion (10.8). I assume it also runs on Snow Leopard (10.6), though I don’t know for sure. Sadly Leopard (10.5) isn’t supported due to Apple breaking binary compatibility on 64bit binaries for some reason.

Download the ready to use DMG/APP here:
gqrx_7.dmg – (02/03/2013) Up to date with GIT. I’ve added a deadlock prevention feature in case your settings keep gqrx from starting up properly. After a crash/forced-close it asks you whether you want to reset all your settings to default. This should help you guys with invalid rtl_tcp settings and the like. I have also fixed rtl_fm to now properly work on OSX (It used to only output noise), as well as multimonNG which now supports umlauts for POCSAG decoding. So check out the bundled command-line utilities! (e.g. /Applications/Gqrx.app/Contents/MacOS/rtl_test -t)

Old versions:
gqrx_6.dmg – Latest (01/16/2013) updates from GIT, yet again. This time I also packaged some command-line utilities (multimonNG rtl_adsb rtl_eeprom rtl_fm rtl_sdr rtl_tcp rtl_test) together with Gqrx. rtl_fm seems to be broken on OSX, yet we’re still triaging the bug. It would be great if you could try it and report whether it works for you. (http://kmkeen.com/rtl-demod-guide/index.html) I am considering packaging up the whole of gnuradio including the companion GUI if there is demand.
gqrx_5.dmg (Latest updates from GIT, supports adjusting the FFT resolution which should fix the pink curtain problem. The zoom slider has been removed from upstream, yet you can still zoom by using the mouse wheel on the axes.)
gqrx_4.dmg (GNU Radio component has now been compiled with “-DTRY_SHM_VMCIRCBUF=OFF”, this should hopefully fix the shared memory problem some of you have encountered. Please report whether it works now.)
gqrx_3.dmg (Rebased to the zoom branch. Credit goes to vpelletier for the awesome patch!)

Pan: left-click on X-axis labels & drag horizontally
Pan (alternative): Mouse wheel on X-axis labels, faster pan with Shift held and slower pan with Ctrl held.
Change central frequency: middle-click on X-axis labels & drag horizontally
Zoom: slider on FFT panel

gqrx_2.dmg (Updated gr-osmosdr and fixed a crash when disabling demod.)
gqrx.dmg

PS:
The screenshot was taken in direct sampling mode, that’s why I was able to receive 0-2.4mhz. I’ll probably blog about my modded dongle soon.

Software licenses:
Gqrx
Qt
multimonNG
boost
gr-osmosdr
rtl-sdr
GNU Radio
FFTW
PortAudio
libusb

Fixing a weird problem where macdeployqt drops icons from app bundle

Elias Önal — Sun, 30 Sep 2012 12:02:08 +0000

Qt has a great tool for building self contained application bundles on OSX, it’s called “macdeployqt”. Though I recently had a really weird bug while using it. When I ran the application normally everything was fine, but once I used the macdeployqt all the icons were missing. After a while investigating this I realized not all types of icons were affected, SVGs wouldn’t show, yet JPGs would. Long story short, you have to explicitly declare the use of the SVG module (or any other module you use) inside the project file so it ends up in the final bundle.

tl;dr:
QT += svg

multimonNG

Elias Önal — Thu, 24 May 2012 01:20:50 +0000

Due to my recent acquisition of an RTL-SDR compatible radio module (Some would call it DVB-T stick) I started playing with radio transmissions. Doing so I found POCSAG transmissions which I tried to decode using multimon. Sadly multimon was very broken, after I finally managed to compile it on OS X I realized it had 64bit bugs preventing the decoding on my system. So I forked it and patched a lot. I rewrote large parts of the POCSAG decoder after reading the patent text as well as implemented the BCH forward error correction. Besides improving POCSAG my main focus was portability, it now even compiles on windows

MultimonNG a fork of multimon. It decodes the following digital transmission modes:
POCSAG512 POCSAG1200 POCSAG2400 EAS UFSK1200 CLIPFSK AFSK1200 AFSK2400 AFSK2400_2 AFSK2400_3 HAPN4800 FSK9600 DTMF ZVEI

The following changes have been made so far:
-Fixes for x64
-Basic functionality on Mac OS X ‘Lion’ (Soundcard/OSS input is unsupported)
-’DUMMY_AUDIO’ “backend” (Gets rid of the OSS dependency, breaks audio in doing so)
-’ONLY_RAW’ disables the format conversion while getting rid of posix dependencies
-Option ‘NO_X11′ to disable the X11 dependency since Apple will drop Xorg soon
-Override mode for POCSAG decoding (e.g. force text decoding)
-Brute-Force BCH implementation for POCSAG forward error correction
-Verbose mode is now listed in ‘-h’
-Merged Debian patches for EAS (Emergency Alert System) decoding (untested)
-Portability is a major goal
-Compiles on Windows (MinGW or Cygwin) without format conversion
-PulseAudio support, contributed by inf_l00p_
-Windows native audio and a VisualStudio/MSVC project file, contributed by bzzt_ploink

In addition to the deprecated legacy Makefile there is also a file for qmake which is the preferred way of building MultimonNG. It’s recommended to use qmake to generate the Makefile. (‘qmake multimonNG.pro && make’)
So far multimonNG has been successfully built on OS X, Debian, Ubuntu and Windows. (On Windows using the Qt-MinGW build environment, as well as Cygwin and VisualStudio/MSVC)

Files can be easily converted into multimonNGs native raw format using ‘sox’.
e.g. “sox -t wav pocsag_short.wav -esigned-integer -b16 -r 22050 -t raw pocsag_short.raw”
GNURadio can also generate the format using the file sink in input mode ‘short’.

Source: https://github.com/EliasOenal/multimonNG/
License: GPLv2

Windows version (Update 02/02/13 – Properly convert umlauts.): multimonNG_win32

Some testfile converted to the native multimon format: poc1200
(Source: http://www.kb9ukd.com/digital/)
To decode it try “multimonNG.exe -a POCSAG1200 -t raw poc1200.raw”.

PS:
Superkuh wrote a bit about using multimonNG with GNURadio allowing for realtime decoding. http://superkuh.com/rtlsdr.html

PPS:
Apparently you can combine multimonNG with rtl_fm to live decode POCSAG. It even seems to be lightweight enough to work on a Raspberry Pi. Thanks to Sonny_Jim from ##rtlsdr on freenode for trying!

Ok, so this works:
rtl_fm -f 153.353e6 -g 100 -s 22050 -l 310 – |multimon -t raw -a POCSAG1200 -f alpha /dev/stdin

Overclocking my HTC Vision aka Desire Z aka G2

Elias Önal — Sun, 01 Jan 2012 06:00:26 +0000

I’ve recently added some modifications to the Cyanogenmod kernel. They include overclocking up to 2ghz as well as lower idle voltages (undervolting) and a higher default maximum frequency. The maximum frequency after bootup is now 1516800hz. It can be changed up to 2016000hz. Frequencies higher than 1612800hz are unstable when using the ondemand governor on my phone, they seem to be stable when used with the performance governor or even the conservative one, so I think it might be related to the fast frequency switching. At 2ghz the phone gets really hot in a matter of minutes so be careful, you can probably damage it using this kernel. Thus I take no responsibility for any damages resulting from using this kernel!

My frequency(in hz)/voltage(in mV)-table is the following:
245760 750
368640 800
768000 900
806400 925
1113600 1000
1209600 1050
1305600 1100
1401600 1150
1497600 1225
1516800 1225
1612800 1300
1708800 1450
1804800 1500
1920000 1500
2016000 1500

Download: zImage bcm4329.ko

PS:
I just was able to lower the voltages a bit, here is the new kernel: zImage_v2
245760 750
368640 800
768000 900
806400 925
1113600 1000
1209600 1050
1305600 1100
1401600 1150
1516800 1200
1612800 1250
1708800 1300
1804800 1400
1920000 1450
2016000 1500

PPS:
I made a third version containing a crude hack to fix the problem with the governors. Now my phone runs at min 245mhz and max 1920mhz using the ondemand governor.
Download: zImage_v3
Source: acpuclock-7×30 (The only file I changed) https://github.com/CyanogenMod/htc-kernel-msm7x30

PPPS:
The easiest way to flash it is using fastboot and adb from the android sdk. I guess I could also build a flashable zip, but I don’t feel like figuring how that works. If someone makes one, feel free to send me a copy, I’ll attach it here.
Flashing the kernel:

fastboot flash zimage zImage

Flashing the new WiFi module:

adb remount adb push bcm4329.ko /system/lib/modules

After using my kernel for quite a while it seems to be pretty stable on my phone. Running at 2GHz I sometimes get random freezes, but 1.92GHz seems stable for daily use. I also tried playing 3d games on 1.92GHz for about half an hour and even though the phone got noticeably hot everything went peachy.

A driver independent and really ugly way to set the display brightness

Elias Önal — Mon, 06 Sep 2010 10:44:34 +0000

I lately had some problems changing my laptops (A Samsung Q45) brightness since the major distributions went on and started using KMS instead of the prior Xorg driver, even though most Samsung laptops aren’t properly supported. Searching around the net I found some hints about using setpci – Writing directly into the hardware.
dekar@vasectomy:~$ sudo dmidecode -s system-manufacturer SAMSUNG ELECTRONICS CO., LTD. dekar@vasectomy:~$ sudo dmidecode -s system-product-name SQ45S70S dekar@vasectomy:~$ lspci | grep VGA 00:02.0 VGA compatible controller: Intel Corporation Mobile GM965/GL960 Integrated Graphics Controller (rev 03) dekar@vasectomy:~$ sudo setpci -s 00:02.0 F4.B=FF
Values between 0×00 and 0xFF should work, though my display turns off once I lower them too far and refuses to start working unless I reboot the whole thing. 0×40 to 0xFF should be safe.

Update:
The following samsung-backlight fork worked for me in fully integrating the backlight control again. Works fine now using the hotkeys

https://github.com/xonatius/samsung-backlight

You probably need to install the kernel sources, at least the headers. Besides this installing should be totally painless and after doing so you can load it using ‘modprobe samsung-backlight’.

My Optoma HD700X projector running at 120hz – So I can probably do 3D?

Elias Önal — Mon, 23 Aug 2010 21:23:52 +0000

I didn’t find any information about this (just people whining about not getting a firmware update) so I feel like posting it so others may find it using google. My HD700X seems to be able to do 120hz. I just did a quick test using my laptop (vga) since my media pc (hdmi) is broken right now, but it seems to work. I am running Debian and all I did was set the resolution, it just worked. The online specs I read state it could only do 100hz, but it even shows me it is actually running at 120hz. So if anyone has one of those projectors, as well as 3D equipment, I would highly appreciate any feedback on how well it works since I am thinking about getting shutter glasses as well.

Update:
Watching 24p video at 24hz is fluent (besides the 24p lagginess), same for 48hz. But from that point on (72hz, 96hz and 120hz) it starts juttering. I am not sure whether that’s vdpau/nvidia or the projector. I also realized my HD700X reports as HD65 according to the EDID data. Pretty weird – I guess the easiest way to find out whether it actually supports 120hz is getting 3d shutter equipment.

Update #2:
Optoma released an official firmware update unlocking 120hz operation including DLP-Link for the HD65, HD700x and GT7000 projectors.

Download it here

My dynamic banner thing is Public Domain now!

Elias Önal — Wed, 13 Jan 2010 06:59:38 +0000

I’ve added the link to the source quite a while ago, but I feel like posting it here as well so php beginners who want to play with Imagemagik can find it, my banner generator is Public Domain now. So you can get it and do whatever you like using it – just don’t blame me if something goes wrong or breaks